RISC-V ISA Explorer · Single-Letter Extensions

F: Single-Precision Float (32-bit)

Ratified 2019-12 · version 2.2.0

Single-precision IEEE 754 arithmetic with 32 floating-point registers and a status register for rounding modes.

Typical use: Basic floating-point workloads

Specification

Open F in the explorer

Dependencies

Requires

Zicsr

Required by

Instructions (30)

Mnemonic	Name	Encoding	Match	Mask
`FADD.S`	Floating-Point Add Single-Precision	`0000000------------------1010011`	`0x53`	`0xfe00007f`
`FCLASS.S`	Floating-Point Classify Single-Precision	`111000000000-----001-----1010011`	`0xe0001053`	`0xfff0707f`
`FCVT.L.S`	Floating-Point Convert Single-Precision to Long	`110000000010-------------1010011`	`0xc0200053`	`0xfff0007f`
`FCVT.LU.S`	Floating-Point Convert Single-Precision to Unsigned Long	`110000000011-------------1010011`	`0xc0300053`	`0xfff0007f`
`FCVT.S.L`	Floating-Point Convert Long to Single-Precision	`110100000010-------------1010011`	`0xd0200053`	`0xfff0007f`
`FCVT.S.LU`	Floating-Point Convert Unsigned Long to Single-Precision	`110100000011-------------1010011`	`0xd0300053`	`0xfff0007f`
`FCVT.S.W`	Floating-Point Convert Word to Single-Precision	`110100000000-------------1010011`	`0xd0000053`	`0xfff0007f`
`FCVT.S.WU`	Floating-Point Convert Unsigned Word to Single-Precision	`110100000001-------------1010011`	`0xd0100053`	`0xfff0007f`
`FCVT.W.S`	Floating-Point Convert Single-Precision to Word	`110000000000-------------1010011`	`0xc0000053`	`0xfff0007f`
`FCVT.WU.S`	Floating-Point Convert Single-Precision to Unsigned Word	`110000000001-------------1010011`	`0xc0100053`	`0xfff0007f`
`FDIV.S`	Floating-Point Divide Single-Precision	`0001100------------------1010011`	`0x18000053`	`0xfe00007f`
`FEQ.S`	Floating-Point Equal Single-Precision	`1010000----------010-----1010011`	`0xa0002053`	`0xfe00707f`
`FLE.S`	Floating-Point Less Than or Equal Single-Precision	`1010000----------000-----1010011`	`0xa0000053`	`0xfe00707f`
`FLT.S`	Floating-Point Less Than Single-Precision	`1010000----------001-----1010011`	`0xa0001053`	`0xfe00707f`
`FLW`	Floating-Point Load Single-Precision	`-----------------010-----0000111`	`0x2007`	`0x707f`
`FMADD.S`	Floating-Point Multiply-Add Single-Precision	`-----00------------------1000011`	`0x43`	`0x600007f`
`FMAX.S`	Floating-Point Maximum-Number Single-Precision	`0010100----------001-----1010011`	`0x28001053`	`0xfe00707f`
`FMIN.S`	Floating-Point Minimum-Number Single-Precision	`0010100----------000-----1010011`	`0x28000053`	`0xfe00707f`
`FMSUB.S`	Floating-Point Multiply-Subtract Single-Precision	`-----00------------------1000111`	`0x47`	`0x600007f`
`FMUL.S`	Floating-Point Multiply Single-Precision	`0001000------------------1010011`	`0x10000053`	`0xfe00007f`
`FMV.W.X`	Floating-Point Move Single-Precision Word from Integer Register	`111100000000-----000-----1010011`	`0xf0000053`	`0xfff0707f`
`FMV.X.W`	Floating-Point Move Single-Precision Word to Integer Register	`111000000000-----000-----1010011`	`0xe0000053`	`0xfff0707f`
`FNMADD.S`	Floating-Point Negate-Multiply-Add Single-Precision	`-----00------------------1001111`	`0x4f`	`0x600007f`
`FNMSUB.S`	Floating-Point Negate-Multiply-Subtract Single-Precision	`-----00------------------1001011`	`0x4b`	`0x600007f`
`FSGNJ.S`	Floating-Point Sign-Inject Single-Precision	`0010000----------000-----1010011`	`0x20000053`	`0xfe00707f`
`FSGNJN.S`	Floating-Point Sign-Inject Negate Single-Precision	`0010000----------001-----1010011`	`0x20001053`	`0xfe00707f`
`FSGNJX.S`	Floating-Point Sign-Inject XOR Single-Precision	`0010000----------010-----1010011`	`0x20002053`	`0xfe00707f`
`FSQRT.S`	Floating-Point Square Root Single-Precision	`010110000000-------------1010011`	`0x58000053`	`0xfff0007f`
`FSUB.S`	Floating-Point Subtract Single-Precision	`0000100------------------1010011`	`0x8000053`	`0xfe00007f`
`FSW`	Floating-Point Store Single-Precision	`-----------------010-----0100111`	`0x2027`	`0x707f`

Control and status registers (3)

Name	Address	Mode	Description
`fcsr`	`0x3`	U	Floating-point control and status register (`frm` + `fflags`)
`fflags`	`0x1`	U	Floating-Point Accrued Exceptions
`frm`	`0x2`	U	Floating-Point Dynamic Rounding Mode