RV32I: Standard Integer Base (32-bit)

Ratified 2019-06 · version 2.1.0

Core 32-bit integer instruction set of loads, stores, arithmetic and branches that every RV32 core implements.

Typical use: Deeply embedded cores with a 32-bit address space

Instructions (41)

Mnemonic	Name	Encoding	Match	Mask
`ADD`	Integer add	`0000000----------000-----0110011`	`0x33`	`0xfe00707f`
`ADDI`	Add immediate	`-----------------000-----0010011`	`0x13`	`0x707f`
`AND`	And	`0000000----------111-----0110011`	`0x7033`	`0xfe00707f`
`ANDI`	And immediate	`-----------------111-----0010011`	`0x7013`	`0x707f`
`AUIPC`	Add upper immediate to pc	`-------------------------0010111`	`0x17`	`0x7f`
`BEQ`	Branch if equal	`-----------------000-----1100011`	`0x63`	`0x707f`
`BGE`	Branch if greater than or equal	`-----------------101-----1100011`	`0x5063`	`0x707f`
`BGEU`	Branch if greater than or equal unsigned	`-----------------111-----1100011`	`0x7063`	`0x707f`
`BLT`	Branch if less than	`-----------------100-----1100011`	`0x4063`	`0x707f`
`BLTU`	Branch if less than unsigned	`-----------------110-----1100011`	`0x6063`	`0x707f`
`BNE`	Branch if not equal	`-----------------001-----1100011`	`0x1063`	`0x707f`
`EBREAK`	Breakpoint exception	`00000000000100000000000001110011`	`0x100073`	`0xffffffff`
`ECALL`	Environment call	`00000000000000000000000001110011`	`0x73`	`0xffffffff`
`FENCE`	Memory ordering fence	`-----------------000-----0001111`	`0xf`	`0x707f`
`FENCE.TSO`	Memory ordering fence, total store ordering	`100000110011-----000-----0001111`	`0x8330000f`	`0xfff0707f`
`JAL`	Jump and link	`-------------------------1101111`	`0x6f`	`0x7f`
`JALR`	Jump and link register	`-----------------000-----1100111`	`0x67`	`0x707f`
`LB`	Load byte	`-----------------000-----0000011`	`0x3`	`0x707f`
`LBU`	Load byte unsigned	`-----------------100-----0000011`	`0x4003`	`0x707f`
`LH`	Load halfword	`-----------------001-----0000011`	`0x1003`	`0x707f`
`LHU`	Load halfword unsigned	`-----------------101-----0000011`	`0x5003`	`0x707f`
`LUI`	Load upper immediate	`-------------------------0110111`	`0x37`	`0x7f`
`LW`	Load word	`-----------------010-----0000011`	`0x2003`	`0x707f`
`OR`	Or	`0000000----------110-----0110011`	`0x6033`	`0xfe00707f`
`ORI`	Or immediate	`-----------------110-----0010011`	`0x6013`	`0x707f`
`SB`	Store byte	`-----------------000-----0100011`	`0x23`	`0x707f`
`SH`	Store halfword	`-----------------001-----0100011`	`0x1023`	`0x707f`
`SLL`	Shift left logical	`0000000----------001-----0110011`	`0x1033`	`0xfe00707f`
`SLLI`	Shift left logical immediate	`0000000----------001-----0010011`	`0x1013`	`0xfe00707f`
`SLT`	Set on less than	`0000000----------010-----0110011`	`0x2033`	`0xfe00707f`
`SLTI`	Set on less than immediate	`-----------------010-----0010011`	`0x2013`	`0x707f`
`SLTIU`	Set on less than immediate unsigned	`-----------------011-----0010011`	`0x3013`	`0x707f`
`SLTU`	Set on less than unsigned	`0000000----------011-----0110011`	`0x3033`	`0xfe00707f`
`SRA`	Shift right arithmetic	`0100000----------101-----0110011`	`0x40005033`	`0xfe00707f`
`SRAI`	Shift right arithmetic immediate	`0100000----------101-----0010011`	`0x40005013`	`0xfe00707f`
`SRL`	Shift right logical	`0000000----------101-----0110011`	`0x5033`	`0xfe00707f`
`SRLI`	Shift right logical immediate	`0000000----------101-----0010011`	`0x5013`	`0xfe00707f`
`SUB`	Subtract	`0100000----------000-----0110011`	`0x40000033`	`0xfe00707f`
`SW`	Store word	`-----------------010-----0100011`	`0x2023`	`0x707f`
`XOR`	Exclusive Or	`0000000----------100-----0110011`	`0x4033`	`0xfe00707f`
`XORI`	Exclusive Or immediate	`-----------------100-----0010011`	`0x4013`	`0x707f`