RISC-V ISA Explorer · Single-Letter Extensions

S: Supervisor ISA

Ratified 2024-10 · version 1.13.0

Supervisor privilege level with its own CSRs and address translation, the level an operating system kernel runs in.

Typical use: Running an operating system kernel

Specification

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Dependencies

Requires

Required by

Instructions (2)

MnemonicNameEncodingMatchMask
SFENCE.VMASupervisor memory-management fence0001001----------0000000011100110x120000730xfe007fff
SRETSupervisor Mode Return from Trap000100000010000000000000011100110x102000730xffffffff

Control and status registers (16)

NameAddressModeDescription
medeleg0x302MMachine Exception Delegation
medelegh0x312MMachine Exception Delegation, High bits
mideleg0x303MMachine Interrupt Delegation
mscontext0x7aaSMachine Supervisor Context
satp0x180SSupervisor Address Translation and Protection
scause0x142SSupervisor Cause
scontext0x5a8SSupervisor Context
scounteren0x106SSupervisor Counter Enable
senvcfg0x10aSSupervisor Environment Configuration
sepc0x141SSupervisor Exception Program Counter
sie0x104SSupervisor interrupt-enable register
sip0x144SSupervisor Interrupt Pending
sscratch0x140SSupervisor Scratch Register
sstatus0x100SSupervisor Status
stval0x143SSupervisor Trap Value
stvec0x105SSupervisor Trap Vector