RISC-V ISA Explorer · Traps

Shvstvecd: Virtual Supervisor Trap Vector (vstvec) supports Direct mode

Ratified 2023-03 · version 1.0.0

vstvec must support Direct mode with any four-byte-aligned base, so a guest can use one trap entry point.

Typical use: Direct-mode trap vectors for virtual supervisor

Specification

Dependencies

Required by

• Sha

Instructions

No instruction encodings are listed for this extension in the catalogue.