RISC-V ISA Explorer · Counters & Profiling

Ssccfg: Counter Configuration (S)

Ratified 2024-03 · version 1.0.0

Supervisor-mode CSRs for configuring and inhibiting the performance counters that M-mode has delegated.

Typical use: Delegating counter configuration to supervisor

Specification

Dependencies

Requires

• Smcdeleg
• Sscsrind

Required by

• Smcdeleg

Instructions

No instruction encodings are listed for this extension in the catalogue.

Control and status registers (1)