RISC-V ISA Explorer · Memory & Addressing
Sspmp: S-level PMP
Ratified 2026-08 · version 1.0.0
Supervisor-mode physical memory protection: per-hart entries that grant or revoke read, write and execute on physical regions without paging.
Typical use: Task isolation on MCU-class cores that have no MMU
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Requires
Required by
Instructions
No instruction encodings are listed for this extension in the catalogue.