RISC-V ISA Explorer · Traps
Sstvecv: stvec Vectored Mode
Ratified 2023-03 · version 1.0.0
Guarantees stvec supports Vectored mode, so each interrupt cause can dispatch to its own entry point.
Typical use: Vectored trap routing
Open Sstvecv in the explorerInstructions
No instruction encodings are listed for this extension in the catalogue.