RISC-V ISA Explorer · Traps
Ssube: Big-Endian S
Ratified 2021-12 · version 1.0.0
Lets U-mode data accesses use big-endian byte order while instruction fetch stays little-endian.
Typical use: Supervisor big-endian/bi-endian
Open Ssube in the explorerInstructions
No instruction encodings are listed for this extension in the catalogue.