RISC-V ISA Explorer · Memory & Addressing
Svpbmt: Page-Based Memory Types
Ratified 2021-12 · version 1.0.0
Two PTE bits set a page's memory type as non-cacheable or I/O, overriding the region's default attributes.
Typical use: Per-page memory types / cacheability
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Requires
Requires one of
Instructions
No instruction encodings are listed for this extension in the catalogue.
Control and status registers (2)
| Name | Address | Mode | Description |
|---|---|---|---|
menvcfg | 0x30a | M | Machine Environment Configuration |
menvcfgh | 0x31a | M | Machine Environment Configuration |