RISC-V ISA Explorer · Vector Subsets (Zv/Zve)

Zvl64b: Min VLEN ≥ 64b

Ratified 2021-11 · version 1.0.0

Guarantees a vector register length of at least 64 bits, so LMUL=1 holds eight byte-sized elements.

Typical use: Code that requires VLEN of at least 64 bits

Specification

Dependencies

Requires

• Zvl32b

Requires one of

• V
• Zve32f
• Zve32x
• Zve64d
• Zve64f
• Zve64x

Required by

• Zve64x
• Zvl128b

Instructions

No instruction encodings are listed for this extension in the catalogue.