sip

Supervisor Interrupt Pending

A restricted view of the interrupt pending bits in mip.

Hypervisor-related interrupts (VS-mode interrupts and Supervisor Guest interrupts) are not reflected in sip even though those interrupts can be taken in HS-mode. Instead, they are reported through hip.

Attributes

Requirement

Defining extensions

S	Supervisor mode

CSR Address

0x144

Length

64-bit

Privilege Mode

Format

Figure 1. sip format

Field Summary

Name	Location	Type	Reset Value
sip.SSIP	1	RW	UNDEFINED_LEGAL
sip.STIP	5	RO-H	UNDEFINED_LEGAL
sip.SEIP	9	RO-H	UNDEFINED_LEGAL
sip.LCOFIP	13	RW-H	UNDEFINED_LEGAL

Name

Location

Type

Reset Value

sip.SSIP

UNDEFINED_LEGAL

sip.STIP

RO-H

UNDEFINED_LEGAL

sip.SEIP

RO-H

UNDEFINED_LEGAL

sip.LCOFIP

RW-H

UNDEFINED_LEGAL

Fields

`SSIP`

Location: 1
Description: Supervisor Software Interrupt Pending

Reports the current pending state of an (H)S-mode software interrupt.

When Supervisor Software Interrupts are not delegated to (H)S-mode (mideleg.SSI is clear), sip.SSIP is read-only 0.

Otherwise, sip.SSIP is an alias of mip.SSIP.

<%- if ext?(:Smaia) -%> When using AIA/IMSIC, IPIs are expected to be delivered as external interrupts and SSIP is not backed by any hardware update (aside from any aliasing effects).

However, SSIP is still writable by S-mode software and, when written, can be used to generate an S-mode Software Interrupt. <%- end -%>

Since it is an alias, writes to sip.SSIP are also be reflected in mip.SSIP<% if ext?(:Smaia) %> and mvip.SSIP<% end %>.

<% if ext?(:Smaia) %>_Aliases_<% else %>_Alias_<% end %>:

mip.SSIP when mideleg.SSI is set <%- if ext?(:Smaia) -%>
mvip.SSIP when mideleg.SSI is set <%- end -%>

To summarize:

mideleg.SSI sip.SSIP behavior

mideleg.SSI	sip.SSIP behavior
0	read-only 0
1	writable alias of mip.SSIP <% if ext?(:Smaia) %>and `mvip.SSIP`<% end %>

read-only 0

writable alias of mip.SSIP <% if ext?(:Smaia) %>and mvip.SSIP<% end %>

Type: RW
Reset value: UNDEFINED_LEGAL

`STIP`

Location: 5
Description: Supervisor Timer Interrupt Pending

Reports the current pending state of an (H)S-mode timer interrupt.

When Supervisor Timer Interrupts are not delegated to (H)S-mode (i.e., mideleg.STI is clear), sip.STIP is read-only 0.

Otherwise, sip.STIP is a read-only view of mip.STIP.

<% if ext?(:Smaia) %>_Aliases_<% else %>_Alias_<% end %>:

mip.STIP when mideleg.STI is set <%- if ext?(:Smaia) -%>
mvip.STIP when mideleg.SSI is set and menvcfg.STCE is clear. <%- end -%>

To summarize:

mideleg.STI sip.STIP behavior

mideleg.STI	sip.STIP behavior
0	read-only 0
1	read-only alias of mip.STIP <% if ext?(:Smaia) %>(and `mvip.STIP` when menvcfg.STCE is clear)<% end %>

read-only 0

read-only alias of mip.STIP <% if ext?(:Smaia) %>(and mvip.STIP when menvcfg.STCE is clear)<% end %>

Type: RO-H
Reset value: UNDEFINED_LEGAL

`SEIP`

Location: 9
Description: Supervisor External Interrupt Pending

Reports the current pending state of an (H)S-mode external interrupt.

When Supervisor External Interrupts are not delegated to (H)S-mode (i.e., mideleg.SEI is clear), sip.SEIP is read-only 0.

Otherwise, sip.SEIP is a read-only view of mip.SEIP.

To summarize:

mideleg.SEI	sip.SEIP behavior
0	read-only 0
1	read-only alias of mip.SEIP

mideleg.SEI

sip.SEIP behavior

read-only 0

read-only alias of mip.SEIP

Type: RO-H
Reset value: UNDEFINED_LEGAL

`LCOFIP`

Location: 13
Description: Local Counter Overflow Interrupt pending

Reports the current pending state of a Local Counter Overflow interrupt.

When Local Counter Overflow interrupts are not delegated to (H)S-mode (i.e., mideleg.LCOFI is clear), sip.LCOFIP is read-only 0.

Otherwise, sip.LCOFIP is an alias of mip.LCOFIP.

Software writes 0 to sip.LCOFIP to clear the pending interrupt.

To summarize:

mideleg.LCOFI sip.LCOFIP behavior

mideleg.LCOFI	sip.LCOFIP behavior
0	read-only 0
1	writable alias of mip.LCOFIP (and `vsip.LCOFIP` when `hideleg.LCOFI` is set)

read-only 0

writable alias of mip.LCOFIP (and vsip.LCOFIP when hideleg.LCOFI is set)

Type: RW-H
Reset value: UNDEFINED_LEGAL