rev8

Byte-reverse register (RV64 encoding)

Reverses the order of the bytes in rs1.

The rev8 mnemonic corresponds to different instruction encodings in RV32 and RV64.

The byte-reverse operation is only available for the full register width. To emulate word-sized and halfword-sized byte-reversal, perform a rev8 xd,xs1 followed by a srai xd,xd,K, where K is XLEN-32 and XLEN-16, respectively.

This instruction must have data-independent timing when extension Zkt is enabled.

Assembly format

rev8 xd, xs1

Decode Variables

RV32
RV64

Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];

Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];

Execution

if (implemented?(ExtensionName::B) && (CSR[misa].B == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
XReg input = X[xs1];
XReg output = 0;
XReg j = xlen() - 1;
for (U32 i = 0; i < xlen(); i = i + 8) {
  output[(i + 7):i] = input[j:(j - 7)];
  j = j - 8;
}
X[xd] = output;