vsuxseg6ei64.v

Vector unordered store 6 elements of 64 bits with index

Stores 6 segments of 64-bit elements from vector register vs2 to memory using unordered access pattern with index register vs1, starting at address in xs1 register, using vector mask vm. The effective element width is 64 bits.

Assembly format

vsuxseg6ei64.v vs3, (xs1), vs2, vm

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> vs3 = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: None

  • Optional: None