vsuxseg5ei32.v
Vector unordered store 5 elements of 32 bits with index
Stores 5 segments of 32-bit elements from vector register vs2 to memory using unordered access pattern with index register vs1, starting at address in xs1 register, using vector mask vm. The effective element width is 32 bits.
Decode Variables
Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> vs3 = $encoding[11:7];