vssra.vi

Vector signed shift right arithmetic with immediate

Performs signed arithmetic right shift on elements from vector register vs2 by immediate shift amount and stores results in vector register vd, using vector mask vm. The operation preserves the sign bit.

Assembly format

vssra.vi vd, vs2, imm, vm

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> imm = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: None

  • Optional: None