vsha2cl.vv
Vector SHA-2 compression loop
Performs the SHA-2 compression loop operation on vector register vs2 using vector register vs1, storing results in vector register vd according to mask vm. This combines multiple SHA-2 operations for efficient hash computation.
| This instruction must have data-independent timing when extension Zkt is enabled. |
Decode Variables
Bits<5> vs2 = $encoding[24:20];
Bits<5> vs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];