vaeskf1.vi

Vector AES key schedule first round

Performs the first round of AES key schedule computation on vector register vs2 using immediate value as round constant, storing results in vector register vd according to mask vm. This instruction is used in AES key expansion.

This instruction must have data-independent timing when extension Zkt is enabled.

Assembly format

vaeskf1.vi vd, vs2, imm

Decode Variables

Bits<5> vs2 = $encoding[24:20];
Bits<5> imm = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64

  • Optional: None