flw

Floating-Point Load Single-Precision

The flw instruction loads a single-precision floating-point value from memory at address xs1 + imm into floating-point register fd. It does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved.

Assembly format

flw fd, imm(xs1)

Decode Variables

signed Bits<12> imm = sext($encoding[31:20], 12);
Bits<5> xs1 = $encoding[19:15];
Bits<5> fd = $encoding[11:7];

Execution

check_f_ok($encoding);
XReg virtual_address = X[xs1] + $signed(imm);
Bits<32> sp_value = read_memory(32, virtual_address, $encoding);
if (implemented?(ExtensionName::D)) {
  F[fd] = nan_box(32, 64, sp_value);
} else {
  F[fd] = sp_value;
}
mark_f_state_dirty();

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

  • LoadAccessFault

  • LoadAddressMisaligned

  • LoadPageFault

Encoding

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Defining extension

F

Access

M

Always

Containing profiles

  • Mandatory: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64

  • Optional: RVI20U32, RVI20U64