vwmaccu.vv
Vector widening unsigned multiply-add
Performs widening unsigned multiplication on elements from vector registers vs2 and vs1, adds the result to elements from vector register vd, and stores the final results in vector register vd, using vector mask vm.
Decode Variables
Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> vs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];