fadd.s

Floating-Point Add Single-Precision

The fadd.s instruction performs single-precision floating-point addition of fs1 and fs2 and writes the final result to fd.

Assembly format

fadd.s fd, fs1, fs2, rm

Decode Variables

Bits<5> fs2 = $encoding[24:20];
Bits<5> fs1 = $encoding[19:15];
Bits<3> rm = $encoding[14:12];
Bits<5> fd = $encoding[11:7];

Execution

check_f_ok($encoding);
RoundingMode mode = rm_to_mode(rm, $encoding);
Bits<32> a = F[fs1];
Bits<32> b = F[fs2];
if (implemented?(ExtensionName::D)) {
  if (F[fs1][63:32] != 32'hffffffff) {
    a = SP_CANONICAL_NAN;
  }
  if (F[fs2][63:32] != 32'hffffffff) {
    b = SP_CANONICAL_NAN;
  }
}
F[fd] = f32_add(a, b, mode);
mark_f_state_dirty();

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

Encoding

svg

Defining extension

F

Access

M

Always

Containing profiles

  • Mandatory: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64

  • Optional: RVI20U32, RVI20U64