c.flw

Load single-precision

Loads a single precision floating-point value from memory into register fd. It computes an effective address by adding the zero-extended offset, scaled by 4, to the base address in register xs1. It expands to flw fd, offset(xs1).

Assembly format

c.flw fd, imm(xs1)

Decode Variables

Bits<7> imm = {$encoding[5], $encoding[12:10], $encoding[6], 2'd0};
Bits<3> fd = $encoding[4:2];
Bits<3> xs1 = $encoding[9:7];

Execution

if (implemented?(ExtensionName::C) && MISA_CSR_IMPLEMENTED && (CSR[misa].C == 1'b0)) {
  reserved_instruction($encoding);
}
XReg virtual_address = X[creg2reg(xs1)] + imm;
F[creg2reg(fd)] = read_memory(32, virtual_address, $encoding);

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

  • LoadAccessFault

  • LoadAddressMisaligned

  • LoadPageFault

Encoding

svg

Defining extension

Zcf

Access

M

Always

Containing profiles

  • Mandatory: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64

  • Optional: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64, RVI20U32, RVI20U64