vwmulsu.vx

Vector widening signed-unsigned multiplication with scalar

Performs signed-unsigned multiplication on elements from vector register vs2 (signed) and scalar register xs1 (unsigned), widens the results, and stores them in vector register vd, using vector mask vm.

Assembly format

vwmulsu.vx vd, vs2, xs1, vm

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: None

  • Optional: None