fsh

Half-precision floating-point store

The fsh instruction stores a half-precision floating-point value from register xd to memory at address xs1 + imm.

fsh does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved.

fsh ignores all but the lower 16 bits in fs2.

fsh is only guaranteed to execute atomically if the effective address is naturally aligned.

Assembly format

fsh fs2, imm(xs1)

Decode Variables

signed Bits<12> imm = sext({$encoding[31:25], $encoding[11:7]}, 12);
Bits<5> xs1 = $encoding[19:15];
Bits<5> fs2 = $encoding[24:20];

Execution

check_f_ok($encoding);
XReg virtual_address = X[xs1] + $signed(imm);
Bits<16> hp_value = F[fs2][15:0];
write_memory(16, virtual_address, hp_value, $encoding);

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

  • LoadAccessFault

  • StoreAmoAccessFault

  • StoreAmoAddressMisaligned

  • StoreAmoPageFault

Encoding

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Defining extension

Access

M

Always

Containing profiles

  • Mandatory: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64

  • Optional: RVI20U32, RVI20U64