vsadd.vi
Vector unsigned addition with immediate
Performs unsigned addition on elements from vector register vs2 and immediate value and stores results in vector register vd, using vector mask vm. The operation follows standard unsigned arithmetic rules.
Decode Variables
Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
signed Bits<5> imm = sext($encoding[19:15], 5);
Bits<5> vd = $encoding[11:7];