vwsll.vi

Vector widening shift left logical by immediate

Performs a widening shift left logical operation on each element in vector register vs2 by the immediate shift amount, storing double-width results in vector register vd according to mask vm.

This instruction must have data-independent timing when extension Zkt is enabled.

Assembly format

vwsll.vi vd, vs2, imm, vm

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> imm = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: RVA20S64, RVA20U64, RVA22S64, RVA22U64, RVA23S64, RVA23U64, RVB23S64, RVB23U64

  • Optional: RVB23U64