vsmul.vx

Vector signed multiplication with scalar

Performs signed multiplication on elements from vector register vs2 and scalar register xs1 and stores results in vector register vd, using vector mask vm.

Assembly format

vsmul.vx vd, vs2, xs1, vm

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: None

  • Optional: None