flh
Half-precision floating-point load
The flh instruction loads a half-precision floating-point value from memory at address xs1 + imm into floating-point register xd.
flh does not modify the bits being transferred; in particular, the payloads of non-canonical NaNs are preserved.
flh is only guaranteed to execute atomically if the effective address is naturally aligned.
Decode Variables
signed Bits<12> imm = sext($encoding[31:20], 12);
Bits<5> xs1 = $encoding[19:15];
Bits<5> fd = $encoding[11:7];Execution
check_f_ok($encoding);
XReg virtual_address = X[xs1] + $signed(imm);
Bits<16> hp_value = read_memory(16, virtual_address, $encoding);
F[fd] = nan_box(16, FLEN, hp_value);
mark_f_state_dirty();