vadd.vi

Vector-immediate integer addition

Adds immediate value to elements from vector register vs2 according to mask vm and stores results in vector register vd. Element width is determined by SEW setting.

This instruction must have data-independent timing when extension Zkt is enabled.

Assembly format

vadd.vi vd, vs2, imm, vm

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
signed Bits<5> imm = sext($encoding[19:15], 5);
Bits<5> vd = $encoding[11:7];

Execution

Encoding

svg

Defining extension

Access

M

Always

Containing profiles

  • Mandatory: None

  • Optional: None