S Extension
Versions
| Version 1.11.0 | |
|---|---|
State |
ratified |
Ratification date |
2019-06 |
| Version 1.12.0 | |
|---|---|
State |
ratified |
Ratification date |
2021-12 |
| Version 1.13.0 | |
|---|---|
State |
ratified |
Ratification date |
2024-10 |
Synopsis
This chapter describes the RISC-V supervisor-level architecture, which contains a common core that is used with various supervisor-level address translation and protection schemes.
|
Supervisor mode is deliberately restricted in terms of interactions with underlying physical hardware, such as physical memory and device interrupts, to support clean virtualization. In this spirit, certain supervisor-level facilities, including requests for timer and interprocessor interrupts, are provided by implementation-specific mechanisms. In some systems, a supervisor execution environment (SEE) provides these facilities in a manner specified by a supervisor binary interface (SBI). Other systems supply these facilities directly, through some other implementation-defined mechanism. |
Instructions
The following instructions are affected by this extension:
Supervisor memory-management fence |
|
Supervisor Mode Return from Trap |
Parameters
This extension has the following implementation options (AKA parameters):
- ASID_WIDTH
-
Type
integer
Valid Values
0 to 16
Description
Number of implemented ASID bits. Maximum is 16 for XLEN==64, and 9 for XLEN==32
- MEDELEG_DELEGATABLE
-
Type
array
Valid Values
64-element array of boolean
Description
Indicates which synchronous exceptions can be delegated via medeleg.
Entry i corresponds to medeleg bit i, whose index is the exception code reported in mcause. When an entry is true, the corresponding medeleg bit is writable. When an entry is false, the corresponding medeleg bit is read-only zero.
An implementation may support any subset of the delegatable exceptions, but no bit of medeleg may be read-only one.
MEDELEG_DELEGATABLE[11](environment call from M-mode) andMEDELEG_DELEGATABLE[16](double trap) must always be false.
- MIDELEG_DELEGATABLE
-
Type
array
Valid Values
64-element array of boolean
Description
Indicates which interrupts can be delegated via mideleg.
Entry i corresponds to mideleg bit i, which uses the same bit layout as mip. When an entry is true, the corresponding interrupt can be delegated: the mideleg bit is writable, except for bits that are always delegated, which are read-only one. When an entry is false, the corresponding mideleg bit is read-only zero.
An unimplemented interrupt cannot be delegated, i.e., if
STI_INTR_IMPLis false,MIDELEG_DELEGATABLE[5]must be false.When the H extension is implemented, VSSI, VSTI, and VSEI are always delegated to HS-mode, so
MIDELEG_DELEGATABLE[2],[6], and[10]must be true. SGEI is also always delegated when any guest external interrupts are implemented (NUM_EXTERNAL_GUEST_INTERRUPTSis nonzero), soMIDELEG_DELEGATABLE[12]must then be true; otherwise it must be false. When H is not implemented, all four must be false.
- MSTATUS_FS_LEGAL_VALUES
-
Type
array
Valid Values
1-element to 4-element array of [0, 1, 2, 3]
Description
The set of values that mstatus.FS supports.
- MSTATUS_VS_LEGAL_VALUES
-
Type
array
Valid Values
1-element to 4-element array of [0, 1, 2, 3]
Description
The set of values that mstatus.VS will accept from a software write.
- MUTABLE_MISA_S
- REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION
- REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT
- REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT
- REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT
- REPORT_VA_IN_STVAL_ON_BREAKPOINT
-
Type
boolean
Valid Values
boolean
Description
- REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT
- REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED
-
Type
boolean
Valid Values
boolean
Description
When true, stval is written with the virtual PC when an instruction fetch is misaligned.
When false, stval is written with 0 when an instruction fetch is misaligned.
Note that when IALIGN=16 (i.e., when the C or one of the
Zc*extensions are implemented), it is impossible to generate a misaligned fetch, and so this parameter has no effect.
- REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT
- REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT
- REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED
- REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT
- REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT
- REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED
- REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT
- SATP_MODE_BARE
-
Type
boolean
Valid Values
boolean
Description
Whether or not satp.MODE == Bare is supported.
- SCOUNTENABLE_EN
-
Type
array
Valid Values
32-element array of boolean
Description
Indicates which counters can delegated via scounteren
SCOUNTENABLE_EN[n]controls whetherscounteren.HPM<n>is writable. It does not depend on whetherhpmcounter<n>/mhpmcounter<n>is read-only zero.
- STVAL_WIDTH
-
Type
integer
Valid Values
0 to 64
Description
The number of implemented bits in stval.
Must be greater than or equal to max(
PHYS_ADDR_WIDTH,VA_SIZE)
- STVEC_MODES
-
Type
array
Valid Values
1-element to 2-element array of [0, 1]
Description
Options:
- 0
-
Direct; All traps set
pcto stvec.BASE - 1
-
Vectored; Asynchronous interrupts set
pcto stvec.BASE + 4 x cause.
If only one mode is given, stvec.MODE is assumed to be read-only with that value. Otherwise, stvec.MODE is read-write.
- SXLEN
-
Type
array
Valid Values
1-element to 2-element array of [32, 64]
Description
Set of XLENs supported in S-mode. Can be one of:
-
[32]: SXLEN is always 32
-
[64]: SXLEN is always 64
-
[32, 64]: SXLEN can be changed (via mstatus.SXL) between 32 and 64
-
- S_MODE_ENDIANNESS
-
Type
string
Valid Values
[little, big, dynamic]
Description
Endianness of data in S-mode. Can be one of:
-
little: S-mode data is always little endian
-
big: S-mode data is always big endian
-
dynamic: S-mode data can be either little or big endian, depending on the CSR field mstatus.SBE
-
- TRAP_ON_ECALL_FROM_S
-
Type
boolean
Valid Values
boolean
Description
Whether or not an ECALL-from-S-mode causes a synchronous exception.
The spec states that implementations may handle ECALLs transparently without raising a trap, in which case the EEI must provide a builtin.