ld

Load doubleword

For RV64, load 64 bits of data into register xd from an address formed by adding xs1 to a signed offset.

<% if ext?(:Zilsd) %> For RV32, Loads a 64-bit value into registers xd and xd+1. The effective address is obtained by adding register xs1 to the sign-extended 12-bit offset. <% end %>

Assembly format

ld xd, imm(xs1)

Decode Variables

  • RV32

  • RV64

signed Bits<12> imm = sext($encoding[31:20], 12);
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];
signed Bits<12> imm = sext($encoding[31:20], 12);
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];

Execution

XReg virtual_address = X[xs1] + $signed(imm);
if (xlen() == 32) {
  if (implemented?(ExtensionName::Zilsd)) {
    Bits<64> data = read_memory(64, virtual_address, $encoding);
    X[xd] = data[31:0];
    X[xd + 1] = data[63:32];
  } else {
    raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
  }
} else {
  X[xd] = read_memory(64, virtual_address, $encoding);
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • IllegalInstruction

  • LoadAccessFault

  • LoadAddressMisaligned

  • LoadPageFault

Encoding

This instruction has different encodings in RV32 and RV64.
RV32
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RV64
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Defining extension

(I || Zilsd)

Access

M

Always

Containing profiles

  • Mandatory: None

  • Optional: None