hip

Hypervisor Interrupt Pending Register

The hip register is an HSXLEN-bit read/write register that indicates pending interrupts at the hypervisor level. It contains interrupt-pending bits for both VS-level and hypervisor-specific interrupts.

Attributes

CSR Address	0x608
Defining extension	H
Length	64-bit
Privilege Mode	S

CSR Address

0x608

Defining extension

Length

64-bit

Privilege Mode

Format

Figure 1. hip format

Field Summary

Name	Location	Type
`SGEIP`	12	RO-H
`VSEIP`	10	RO-H
`VSTIP`	6	RO-H
`VSSIP`	2	RO-H

Fields

`SGEIP`

Location: hip[12]
Description: Pending interrupt bit for supervisor guest external interrupts (SGEI). This bit is 1 if and only if the logical AND of hgeip and hgeie is nonzero.
Type

RO-H	Read-Only with Hardware update Writes are ignored. Reads reflect a value dynamically generated by hardware.

Reset value: 0

`VSEIP`

Location: hip[10]
Description: Pending interrupt bit for VS-level external interrupts (VSEI). This bit is the logical OR of vseip from hvip, the interrupt from hgeip selected by hstatus.VGEIN, and any other external interrupt signal directed to VS-level.
Type

RO-H	Read-Only with Hardware update Writes are ignored. Reads reflect a value dynamically generated by hardware.

Reset value: 0

`VSTIP`

Location: hip[6]
Description: Pending interrupt bit for VS-level timer interrupts (VSTI). This bit is the logical OR of vstip from hvip and any other timer interrupt directed to VS-level.
Type

RO-H	Read-Only with Hardware update Writes are ignored. Reads reflect a value dynamically generated by hardware.

Reset value: 0

`VSSIP`

Location: hip[2]
Description: Pending interrupt bit for VS-level software interrupts (VSSI). This bit is an alias of the vssip bit in hvip.
Type

RO-H	Read-Only with Hardware update Writes are ignored. Reads reflect a value dynamically generated by hardware.

Reset value

Software write

This field has special behavior when written by software (e.g., through csrrw).

When software tries to write csr_value, the field will be written with the return value of the function below.

CSR[hvip].VSSIP = csr_value.VSSIP;
return csr_value.VSSIP;

Software read

This CSR may return a value that is different from what is stored in hardware.

Pruned
Original

XReg res = 0;
if (($bits(CSR[CSR[hgeie]]) & $bits(CSR[CSR[hgeip]])) != 0) {
  res[12] = 1'b1;
}
if (CSR[hvip].VSEIP == 1'b1) {
  res[10] = 1'b1;
}
if ((CSR[hvip].VSTIP == 1'b1) || read_mtime() + CSR[htimedelta].DELTA) >= CSR[vstimecmp].TIME {
  res[6] = 1'b1;
}
if (CSR[hvip].VSSIP == 1'b1) {
  res[2] = 1'b1;
}
return res;

XReg res = 0;
if (($bits(CSR[CSR[hgeie]]) & $bits(CSR[CSR[hgeip]])) != 0) {
  res[12] = 1'b1;
}
if (CSR[hvip].VSEIP == 1'b1) {
  res[10] = 1'b1;
}
if (implemented?(ExtensionName::Sstc)) {
  if ((CSR[hvip].VSTIP == 1'b1) || read_mtime() + CSR[htimedelta].DELTA) >= CSR[vstimecmp].TIME {
    res[6] = 1'b1;
  }
} else {
  if (CSR[hvip].VSTIP == 1'b1) {
    res[6] = 1'b1;
  }
}
if (CSR[hvip].VSSIP == 1'b1) {
  res[2] = 1'b1;
}
return res;