c.ld

Load double

This instruction is defined by:

Encoding

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Synopsis

Loads a 64-bit value from memory into register xd. It computes an effective address by adding the zero-extended offset, scaled by 8, to the base address in register xs1. It expands to ld xd, offset(xs1). For RV32, if the Zclsd extension is enabled, this instruction loads a 64-bit value into registers xd and xd+1. It computes an effective address by adding the zero-extended imm, scaled by 8, to the base address in register xs1.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<8> imm = {$encoding[6:5], $encoding[12:10], 3'd0};
Bits<3> xd = $encoding[4:2];
Bits<3> xs1 = $encoding[9:7];

Execution

  • Pruned, XLEN == 64

  • Original

XReg virtual_address = X[creg2reg(xs1)] + imm;
X[creg2reg(xd)] = sext(read_memory(64, virtual_address, $encoding), 64);
if (implemented?(ExtensionName::C) && (CSR[misa].C == 1'b0)) {
  raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
}
if (xlen() == 32) {
  if (implemented?(ExtensionName::Zclsd)) {
    Bits<64> val = read_memory(64, X[creg2reg(xs1)] + imm, $encoding);
    X[creg2reg(xd)] = val[31:0];
    X[creg2reg(xd + 1)] = val[63:32];
  } else {
    raise(ExceptionCode::IllegalInstruction, mode(), $encoding);
  }
} else {
  XReg virtual_address = X[creg2reg(xs1)] + imm;
  X[creg2reg(xd)] = sext(read_memory(64, virtual_address, $encoding), 64);
}

Exceptions

This instruction may result in the following synchronous exceptions:

  • LoadAccessFault

  • LoadPageFault