vzip.vv

Vector zip

This instruction is defined by:

Encoding

Synopsis

Interleaves source vector register groups vs2 and vs1, each with EMUL=LMUL/2, into destination vd with EMUL=LMUL. For destination index i, even indices read vs2[i/2] and odd indices read vs1[i/2]. Standard vector masking, prestart, inactive, and tail handling applies. The source and destination groups may overlap only when source EMUL is at least 1 and their highest-numbered registers coincide. The encoding is illegal when 2*SEW > LMUL * ELEN or overlap rules are violated.

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> vs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

Pruned, XLEN == 64
Original