vwmul.vv

Vector widening signed multiplication

This instruction is defined by:

Encoding

svg

Synopsis

Performs signed multiplication on elements from vector registers vs2 and vs1, widens the results, and stores them in vector register vd, using vector mask vm. The operation follows standard signed arithmetic rules.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<1> vm = $encoding[25];
Bits<5> vs2 = $encoding[24:20];
Bits<5> vs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

  • Pruned, XLEN == 64

  • Original