fdiv.q

Floating-Point Divide Quad-Precision

This instruction is defined by:

Encoding

Synopsis

The fdiv.q performs the quad-precision floating-point division of fs1 by fs2 and writes the result to floating-point register fd.` The rounding mode is specified by the value in the floating-point Control and Status register (FCSR) or by the value in the rm field of the instruction.

The operation is performed according to the IEEE 754-2008 standard for quad-precision floating-point arithmetic.

The instruction sets the floating-point exception flags according to the result of the operation.

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

Bits<5> fs2 = $encoding[24:20];
Bits<5> fs1 = $encoding[19:15];
Bits<3> rm = $encoding[14:12];
Bits<5> fd = $encoding[11:7];

Execution

Pruned, XLEN == 64
Original