lxsuwhu
Load scaled indexed halfword unsigned with unsigned word index
This instruction is defined by:
Synopsis
Load 16 bits of data into register xd from the effective address
X[xs2] + (zext32(X[xs1]) << 1), where xs2 is the base and xs1 is the
index. The index is zero-extended from X[xs1][31:0] before scaling.
Zero extend the loaded halfword to 64 bits.
This instruction is defined only for RV64.
Decode Variables
Bits<5> xs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];
Execution
-
Pruned, XLEN == 64
-
Original
XReg virtual_address = X[xs2] + (X[xs1][31:0] `<< 1);
X[xd] = read_memory(16, virtual_address, $encoding);
XReg virtual_address = X[xs2] + (X[xs1][31:0] `<< 1);
X[xd] = read_memory(16, virtual_address, $encoding);