prefetch.i

Cache block prefetch for instruction fetch

This instruction is defined by:

Encoding

Synopsis

A prefetch.i instruction indicates to hardware that the cache block whose effective address is the sum of the base address specified in xs1 and the sign-extended offset encoded in imm[11:0], where imm[4:0] equals 0b00000, is likely to be accessed by an instruction fetch in the near future.

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

signed Bits<12> imm = sext({$encoding[31:25], 5'd0}, 12);
Bits<5> xs1 = $encoding[19:15];

Execution

Pruned, XLEN == 64
Original

XReg address = X[xs1] + $signed(imm << 5);
prefetch_instruction(address);

XReg address = X[xs1] + $signed(imm << 5);
prefetch_instruction(address);