vs1r.v Vector store 1 element with register stride This instruction is defined by: Encoding Synopsis Stores 1 segment of elements from vector register vs2 to memory starting at address in xs1 register with stride in xs2, using vector mask vm. The effective element width is determined by SEW setting. Access M HS U VS VU Always Always Always Always Always Decode Variables Bits<5> xs1 = $encoding[19:15]; Bits<5> vs3 = $encoding[11:7]; Execution Pruned, XLEN == 64 Original