mcountinhibit

Machine Counter Inhibit

Bits to inhibit (stops counting) performance counters.

The counter-inhibit register mcountinhibit is a WARL register that controls which of the hardware performance-monitoring counters increment. The settings in this register only control whether the counters increment; their accessibility is not affected by the setting of this register.

When the CY, IR, or HPMn bit in the mcountinhibit register is clear, the mcycle, minstret, or mhpmcountern register increments as usual. When the CY, IR, or HPM_n_ bit is set, the corresponding counter does not increment.

The mcycle CSR may be shared between harts on the same core, in which case the mcountinhibit.CY field is also shared between those harts, and so writes to mcountinhibit.CY will be visible to those harts.

If the mcountinhibit register is not implemented, the implementation behaves as though the register were set to zero.

When the mcycle and minstret counters are not needed, it is desirable to conditionally inhibit them to reduce energy consumption. Providing a single CSR to inhibit all counters also allows the counters to be atomically sampled.

Because the mtime counter can be shared between multiple cores, it cannot be inhibited with the mcountinhibit mechanism.

Attributes

CSR Address	0x320
Defining extension	(Sm && `MCOUNTINHIBIT_IMPLEMENTED` == true)
Length	32-bit
Privilege Mode	M

CSR Address

0x320

Defining extension

(Sm && MCOUNTINHIBIT_IMPLEMENTED == true)

Length

32-bit

Privilege Mode

Format

Figure 1. mcountinhibit format

Field Summary

Name Location Type Reset Value

Name	Location	Type	Reset Value
`CY`	0	RW	UNDEFINED_LEGAL
`IR`	2	RW	UNDEFINED_LEGAL
`HPM3`	3	RW	UNDEFINED_LEGAL
`HPM4`	4	RW	UNDEFINED_LEGAL
`HPM5`	5	RW	UNDEFINED_LEGAL
`HPM6`	6	RW	UNDEFINED_LEGAL
`HPM7`	7	RW	UNDEFINED_LEGAL
`HPM8`	8	RW	UNDEFINED_LEGAL
`HPM9`	9	RW	UNDEFINED_LEGAL
`HPM10`	10	RW	UNDEFINED_LEGAL

CY

UNDEFINED_LEGAL

IR

UNDEFINED_LEGAL

HPM3

UNDEFINED_LEGAL

HPM4

UNDEFINED_LEGAL

HPM5

UNDEFINED_LEGAL

HPM6

UNDEFINED_LEGAL

HPM7

UNDEFINED_LEGAL

HPM8

UNDEFINED_LEGAL

HPM9

UNDEFINED_LEGAL

HPM10

UNDEFINED_LEGAL

Fields

`CY`

Location: mcountinhibit[0]
Description: When set, mcycle.COUNT stops counting in all privilege modes.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`IR`

Location: mcountinhibit[2]
Description: When set, minstret.COUNT stops counting in all privilege modes.
Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM3`

Location: mcountinhibit[3]
Description

When set, hpmcounter3.COUNT stops counting in all privilege modes.

Since hpmcounter3 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM4`

Location: mcountinhibit[4]
Description

When set, hpmcounter4.COUNT stops counting in all privilege modes.

Since hpmcounter4 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM5`

Location: mcountinhibit[5]
Description

When set, hpmcounter5.COUNT stops counting in all privilege modes.

Since hpmcounter5 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM6`

Location: mcountinhibit[6]
Description

When set, hpmcounter6.COUNT stops counting in all privilege modes.

Since hpmcounter6 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM7`

Location: mcountinhibit[7]
Description

When set, hpmcounter7.COUNT stops counting in all privilege modes.

Since hpmcounter7 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM8`

Location: mcountinhibit[8]
Description

When set, hpmcounter8.COUNT stops counting in all privilege modes.

Since hpmcounter8 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM9`

Location: mcountinhibit[9]
Description

When set, hpmcounter9.COUNT stops counting in all privilege modes.

Since hpmcounter9 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL

`HPM10`

Location: mcountinhibit[10]
Description

When set, hpmcounter10.COUNT stops counting in all privilege modes.

Since hpmcounter10 is not implemented, this field is read-only zero.

Type

RW	Read-Write Field is writable by software. Any value that fits in the field is acceptable and shall be retained for subsequent reads.

Reset value: UNDEFINED_LEGAL