lh.aqrl

Load Halfword Acquire Release

This instruction is defined by:

Encoding

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Synopsis

Load 16 bits of data from the address in xs1 into register xd, sign-extending the result to XLEN bits.

This instruction has both acquire and release semantics. No subsequent memory operations (in program order) from this hart can be observed to occur before this load completes, and no previous memory operations can be observed to occur after this load completes.

The address must be naturally aligned (2-byte aligned); if not, an address-misaligned or access-fault exception will be raised.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];

Execution

  • Pruned, XLEN == 64

  • Original

XReg virtual_address = X[xs1];
if (!is_naturally_aligned(16, virtual_address)) {
  raise(ExceptionCode::LoadAddressMisaligned, mode(), virtual_address);
}
X[xd] = sext(read_memory_aligned(16, virtual_address, $encoding, 1'b1, 1'b1), 16);
XReg virtual_address = X[xs1];
if (!is_naturally_aligned(16, virtual_address)) {
  raise(ExceptionCode::LoadAddressMisaligned, mode(), virtual_address);
}
X[xd] = sext(read_memory_aligned(16, virtual_address, $encoding, 1'b1, 1'b1), 16);

Exceptions

This instruction may result in the following synchronous exceptions:

  • LoadAccessFault

  • LoadAddressMisaligned

  • LoadPageFault