fmadd.q

Floating-Point Multiply-Add Quad-Precision

This instruction is defined by:

Encoding

Synopsis

The fmadd.q instruction performs a floating-point multiply-add operation on the values in registers fs1, fs2, and fs3. It computes the result as (fs1 * fs2) + fs3 and writes the result to the destination register fd.

The fused multiply-add instructions must set the invalid operation exception flag when the multiplicands are and zero, even when the addend is a quiet NaN.

Access

M	HS	U	VS	VU
Always	Always	Always	Always	Always

Always

Decode Variables

Bits<5> fs3 = $encoding[31:27];
Bits<5> fs2 = $encoding[24:20];
Bits<5> fs1 = $encoding[19:15];
Bits<3> rm = $encoding[14:12];
Bits<5> fd = $encoding[11:7];

Execution

Pruned, XLEN == 64
Original