Zmmul Extension

Implemented Version

1.0.0

Versions

Version 1.0.0

State

ratified

Ratification date

2022-06

Synopsis

The Zmmul extension implements the multiplication subset of the M extension. It adds MUL, MULH, MULHU, MULHSU, and (for RV64 only) MULW. The encodings are identical to those of the corresponding M-extension instructions. M implies Zmmul.

The Zmmul extension enables low-cost implementations that require multiplication operations but not division. For many microcontroller applications, division operations are too infrequent to justify the cost of divider hardware. By contrast, multiplication operations are more frequent, making the cost of multiplier hardware more justifiable. Simple FPGA soft cores particularly benefit from eliminating division but retaining multiplication, since many FPGAs provide hardwired multipliers but require dividers be implemented in soft logic.

Instructions

The following instructions are added by this extension in the example_rv64_with_overlay configuration:

mul

Signed multiply

mulh

Signed multiply high

mulhsu

Signed/unsigned multiply high

mulhu

Unsigned multiply high