aes64ks2 :: RISC-V Specification for example_rv64_with

Encoding

This instruction implements the additional XOR’ing of key words as part of the AES block cipher Key Schedule.

M	HS	U	VS	VU
Always	Always	Always	Always	Always

M

HS

U

VS

VU

Always

Bits<5> xs2 = $encoding[24:20];
Bits<5> xs1 = $encoding[19:15];
Bits<5> xd = $encoding[11:7];