vsha2cl.vv

Vector SHA-2 compression loop

This instruction is defined by:

Encoding

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Synopsis

Performs the SHA-2 compression loop operation on vector register vs2 using vector register vs1, storing results in vector register vd according to mask vm. This combines multiple SHA-2 operations for efficient hash computation.

Access

M HS U VS VU

Always

Always

Always

Always

Always

Decode Variables

Bits<5> vs2 = $encoding[24:20];
Bits<5> vs1 = $encoding[19:15];
Bits<5> vd = $encoding[11:7];

Execution

  • Pruned, XLEN == 64

  • Original