Implemented CSRs

The following are implemented by the example_rv64_with_overlay configuration:

  • fcsr Floating-point control and status register (frm + fflags)

  • fflags Floating-Point Accrued Exceptions

  • frm Floating-Point Dynamic Rounding Mode

  • hcounteren Hypervisor Counter Enable

  • henvcfg Hypervisor Environment Configuration

  • hgatp Hypervisor guest address translation and protection

  • hgeie Hypervisor Guest External Interrupt Enable Register

  • hgeip Hypervisor Guest External Interrupt Pending Register

  • hideleg Hypervisor Interrupt Delegation Register

  • hie Hypervisor Interrupt Enable Register

  • hip Hypervisor Interrupt Pending Register

  • htimedelta Hypervisor time delta

  • htinst Hypervisor Trap Instruction Register

  • htval Hypervisor Trap Value Register

  • hvip Hypervisor Virtual Interrupt Pending Register

  • mtinst Machine Trap Instruction Register

  • mtval2 Machine Second Trap Value Register

  • vsatp Virtual Supervisor Address Translation and Protection

  • vsie Virtual Supervisor Interrupt Enable

  • vsip Virtual Supervisor Interrupt Pending

  • vsscratch Virtual Supervisor Scratch Register

  • mcounteren Machine Counter Enable

  • pmpaddr0 PMP Address 0

  • pmpaddr1 PMP Address 1

  • pmpaddr10 PMP Address 10

  • pmpaddr11 PMP Address 11

  • pmpaddr12 PMP Address 12

  • pmpaddr13 PMP Address 13

  • pmpaddr14 PMP Address 14

  • pmpaddr15 PMP Address 15

  • pmpaddr2 PMP Address 2

  • pmpaddr3 PMP Address 3

  • pmpaddr4 PMP Address 4

  • pmpaddr5 PMP Address 5

  • pmpaddr6 PMP Address 6

  • pmpaddr7 PMP Address 7

  • pmpaddr8 PMP Address 8

  • pmpaddr9 PMP Address 9

  • pmpcfg0 PMP Configuration Register 0

  • pmpcfg2 PMP Configuration Register 2

  • scounteren Supervisor Counter Enable

  • mcyclecfg Machine Cycle Counter Configuration

  • mcyclecfgh Machine Cycle Counter Configuration High

  • minstretcfg Machine Instructions-Retired Counter Configuration

  • minstretcfgh Machine Instructions-Retired Counter Configuration High

  • scountovf Supervisor Count Overflow

  • stimecmp Supervisor timer compare

  • vstimecmp Virtual supervisor timer compare

  • vcsr Vector Control and Status Register

  • vl Vector Length

  • vlenb Vector Byte Length

  • vstart Vector Start Index

  • vtype Vector Type

  • vxrm Vector Fixed-Point Rounding Mode

  • vxsat Vector Fixed-Point Saturate Flag

  • mcountinhibit Machine Counter Inhibit

  • hpmcounter10 Unprivileged Hardware Performance Counter 10

  • hpmcounter11 Unprivileged Hardware Performance Counter 11

  • hpmcounter12 Unprivileged Hardware Performance Counter 12

  • hpmcounter13 Unprivileged Hardware Performance Counter 13

  • hpmcounter14 Unprivileged Hardware Performance Counter 14

  • hpmcounter15 Unprivileged Hardware Performance Counter 15

  • hpmcounter16 Unprivileged Hardware Performance Counter 16

  • hpmcounter17 Unprivileged Hardware Performance Counter 17

  • hpmcounter18 Unprivileged Hardware Performance Counter 18

  • hpmcounter19 Unprivileged Hardware Performance Counter 19

  • hpmcounter20 Unprivileged Hardware Performance Counter 20

  • hpmcounter21 Unprivileged Hardware Performance Counter 21

  • hpmcounter22 Unprivileged Hardware Performance Counter 22

  • hpmcounter23 Unprivileged Hardware Performance Counter 23

  • hpmcounter24 Unprivileged Hardware Performance Counter 24

  • hpmcounter25 Unprivileged Hardware Performance Counter 25

  • hpmcounter26 Unprivileged Hardware Performance Counter 26

  • hpmcounter27 Unprivileged Hardware Performance Counter 27

  • hpmcounter28 Unprivileged Hardware Performance Counter 28

  • hpmcounter29 Unprivileged Hardware Performance Counter 29

  • hpmcounter3 Unprivileged Hardware Performance Counter 3

  • hpmcounter30 Unprivileged Hardware Performance Counter 30

  • hpmcounter31 Unprivileged Hardware Performance Counter 31

  • hpmcounter4 Unprivileged Hardware Performance Counter 4

  • hpmcounter5 Unprivileged Hardware Performance Counter 5

  • hpmcounter6 Unprivileged Hardware Performance Counter 6

  • hpmcounter7 Unprivileged Hardware Performance Counter 7

  • hpmcounter8 Unprivileged Hardware Performance Counter 8

  • hpmcounter9 Unprivileged Hardware Performance Counter 9

  • mhpmcounter10 Machine Hardware Performance Counter 10

  • mhpmcounter3 Machine Hardware Performance Counter 3

  • mhpmcounter4 Machine Hardware Performance Counter 4

  • mhpmcounter5 Machine Hardware Performance Counter 5

  • mhpmcounter6 Machine Hardware Performance Counter 6

  • mhpmcounter7 Machine Hardware Performance Counter 7

  • mhpmcounter8 Machine Hardware Performance Counter 8

  • mhpmcounter9 Machine Hardware Performance Counter 9

  • mhpmevent10 Machine Hardware Performance Counter 10 Control

  • mhpmevent3 Machine Hardware Performance Counter 3 Control

  • mhpmevent4 Machine Hardware Performance Counter 4 Control

  • mhpmevent5 Machine Hardware Performance Counter 5 Control

  • mhpmevent6 Machine Hardware Performance Counter 6 Control

  • mhpmevent7 Machine Hardware Performance Counter 7 Control

  • mhpmevent8 Machine Hardware Performance Counter 8 Control

  • mhpmevent9 Machine Hardware Performance Counter 9 Control

  • cycle Cycle counter for RDCYCLE Instruction

  • hedeleg Hypervisor Exception Delegation

  • hstateen0 Hypervisor State Enable 0 Register

  • hstateen1 Hypervisor State Enable 1 Register

  • hstateen2 Hypervisor State Enable 2 Register

  • hstateen3 Hypervisor State Enable 3 Register

  • hstatus Hypervisor Status

  • instret Instructions retired counter for RDINSTRET Instruction

  • marchid Machine Architecture ID

  • mcause Machine Cause

  • mconfigptr Machine Configuration Pointer

  • mcycle Machine Cycle Counter

  • medeleg Machine Exception Delegation

  • menvcfg Machine Environment Configuration

  • mepc Machine Exception Program Counter

  • mhartid Machine Hart ID

  • mideleg Machine Interrupt Delegation

  • mie Machine Interrupt Enable

  • mimpid Machine Implementation ID

  • minstret Machine Instructions Retired Counter

  • mip Machine Interrupt Pending

  • misa Machine ISA Control

  • mscratch Machine Scratch Register

  • mstateen0 Machine State Enable 0 Register

  • mstateen1 Machine State Enable 1 Register

  • mstateen2 Machine State Enable 2 Register

  • mstateen3 Machine State Enable 3 Register

  • mstatus Machine Status

  • mtval Machine Trap Value

  • mtvec Machine Trap Vector Control

  • mvendorid Machine Vendor ID

  • satp Supervisor Address Translation and Protection

  • scause Supervisor Cause

  • senvcfg Supervisor Environment Configuration

  • sepc Supervisor Exception Program Counter

  • sie Supervisor interrupt-enable register

  • sip Supervisor Interrupt Pending

  • sscratch Supervisor Scratch Register

  • sstateen0 Supervisor State Enable 0 Register

  • sstateen1 Supervisor State Enable 1 Register

  • sstateen2 Supervisor State Enable 2 Register

  • sstateen3 Supervisor State Enable 3 Register

  • sstatus Supervisor Status

  • stval Supervisor Trap Value

  • stvec Supervisor Trap Vector

  • time Timer for RDTIME Instruction

  • vscause Virtual Supervisor Cause

  • vsepc Virtual Supervisor Exception Program Counter

  • vsstatus Virtual Supervisor Status

  • vstval Virtual supervisor Trap Value

  • vstvec Virtual Supervisor Trap Vector